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ML13155 Wideband FM IF
SEMICONDUCTOR TECHNICAL DATA
Legacy Device: Motorola MC13155 The ML13155 is a complete wideband FM detector designed for satellite TV and other wideband data and analog FM applications. This device may be cascaded for higher IF gain and extended Receive Signal Strength Indicator (RSSI) range. * * * * * * * 12 MHz Video/Baseband Demodulator Ideal for Wideband Data and Analog FM Systems Limiter Output for Cascade Operation Low Drain Current: 7.0 mA Low Supply Voltage: 3.0 to 6.0 V Operates to 300 Mhz Operating Temperature Range TA = -40 to +85C
MAXIMUM RATINGS
Rating Power Supply Voltage Input Voltage Junction Temperature Storage Temperature Range
NOTE:
16 1
SO-16 = -5P PLASTIC PACKAGE CASE 751B (SO-16) CROSS REFERENCE/ORDERING INFORMATION PACKAGE MOTOROLA LANSDALE SO 16 MC13155D ML13155-5P
Pin 11, 14 1, 16 - -
Symbol VEE (max) Vin TJ Tstg
Value 6.5 1.0 +150 - 65 to +150
Unit Vdc Vrms C C
Note: Lansdale lead free (Pb) product, as it becomes available, will be identified by a part number prefix change from ML to MLE.
Devices should not be operated at or outside these values. The "Recommended Operating Conditions" provide for actual device operation.
PIN CONNECTIONS
Figure 1. Representative Block Diagram
Input Decouple
1 2 3 4 5 6 7 8 (Top View)
16 15 14 13 12 11 10 9
Input Decouple VEE1 RSSI Buffer RSSI VEE2 Limiter Out Quad Coil
Buffered RSSI Decouple Output 15 13
RSSI Output 12
Limiter Output 10
VCC1 Output Output
16 Input 1 Input Three Stage Amplifier Detector
9 Quad Coil 8
VCC2 Limiter Out Quad Coil
2 Decouple
4 Balanced Outputs
5
7 Limiter Output
NOTE: This device requires careful layout and decoupling to ensure stable operation.
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RECOMMENDED OPERATING CONDITIONS
Rating Power Supply Voltage (TA= 25C) - 40C TA 85C Maximum Input Frequency Ambient Temperature Range Pin 11, 14 3, 6 1, 16 - Symbol VEE VCC fin TJ Value - 3.0 to - 6.0 Grounded 300 - 40 to + 85 Unit Vdc MHz C
DC ELECTRICAL CHARACTERISTICS (TA = 25C, no input signal.)
Characteristic Drain Current (VEE = - 5.0 Vdc) (VEE = - 5.0 Vdc) Drain Current Total (see Figure 3) (VEE = - 5.0 Vdc) (VEE = - 6.0 Vdc) (VEE = - 3.0 Vdc) Pin 11 14 14 11, 14 Symbol I11 I14 I14 IT tal o Min 2.0 3.0 3.0 5.0 5.0 5.0 4.7 Typ 2.8 4.3 4.3 7.1 7.5 7.5 6.6 Max 4.0 6.0 6.0 10 10.5 10.5 9.5 Unit mA
mA
AC ELECTRICAL CHARACTERISTICS (TA = 25C, fIF = 70 MHz, VEE = - 5.0 Vdc Figure 2, unless otherwise noted.)
Characteristic Input for - 3 dB Limiting Sensitivity Differential Detector Output Voltage (Vin = 10 mVrms) (fdev = 3.0 MHz) (VEE = - 6.0 Vdc) (VEE = - 5.0 Vdc) (VEE = - 3.0 Vdc) Detector DC Offset Voltage RSSI Slope RSSI Dynamic Range RSSI Output (Vin = 100 Vrms) (Vin = 1.0 mVrms) (Vin = 10 mVrms) (Vin = 100 mVrms) (Vin = 500 mVrms) RSSI Buffer Maximum Output Current (Vin = 10 mVrms) Differential Limiter Output (Vin = 1.0 mVrms) (Vin = 10 mVrms) Demodulator Video 3.0 dB Bandwidth Input Impedance (Figure 14) @ 70 MHz Rp (VEE = - 5.0 Vdc) @ 70 MHz Cp (C2=C15 = 100 p) Differential IF Power Gain
NOTE: Positive currents are out of the pins of the device.
Pin 1, 16 4, 5
Min - 470 450 380
Typ 1.0 590 570 500 - 2.1 35 2.1 2.4 24 65 75 2.3 140 180 12 450 4.8 46
Max 2.0 700 680 620 250 2.8 39 - - 36 - - - - - - - - -
Unit mVrms mVp-p
4, 5 13 13 12
- 250 1.4 31 - - 16 - -
mVdc A/dB dB A
13 7, 10 4, 5 1, 16
- 100 - - - -
mAdc mVrms
MHz pF dB
1, 7, 10, 16
-
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CIRCUIT DESCRIPTION The ML13155 consists of a wideband three-stage limiting indicator (RSSI) circuit which provides a current output linamplifier, a wideband quadrature detector which may be early proportional to the IF input signal level for approxioperated up to 200 MHz, and a received signal strength mately 35 dB range of input level.
Figure 2. Test Circuit
1.0n Vin 49.9 1 IN1 2 DEC1 3 VCC1 4 DETO1 5 DETO2 6 VCC2 Limiter 1 Output 330 7 LIMO1 1.0n 8 QUAD1 QUAD2 9 IN2 16 10n DEC2 15 VEE1 14 RSSI 13 Buffer 1.0k RSSI 12 VEE2 11 LIMO2 10 1.0n 330 1.0n 1.0n 100n Limiter 2 Output 10 VEE VEE + VEE + 1.0n 27
1.0n
100n
10
Video Output
499 20p L1 L1 - Coilcraft part number 146-09J08S
260n
APPLICATIONS INFORMATION EVALUATION PC BOARD The evaluation PCB shown in Figures 19 and 20 is very versatile and is designed to cascade two ICs. The center section of the board provides an area for attaching all surface mount components to the circuit side and radial leaded components to the component ground side of the PCB (see Figures 17 and 18). Additionally, the peripheral area surrounding the RF core provides pads to add supporting and interface circuitry as a particular application dictates. This evaluation board will be discussed and referenced in this section. LIMITING AMPLIFIER Differential input and output ports interfacing the three stage limiting amplifier provide a differential power gain of typically 46 dB and useable frequency range of 300 MHz. The IF gain flatness may be controlled by decoupling of the internal
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feedback network at Pins 2 and 15. Scattering parameter (S-parameter) characterization of the IF as a two port linear amplifier is useful to implement maximum stable power gain, input matching, and stability over a desired bandpass response and to ensure stable operation outside the bandpass as well. The ML13155 is unconditionally stable over most of its useful operating frequency range; however, it can be made unconditionally stable over its entire operating range with the proper decoupling of Pins 2 and 15. Relatively small decoupling capacitors of about 100 pF have a significant effect on the wideband response and stability. This is shown in the scattering parameter tables where S-parameters are shown for various values of C2 and C15 and at VEE of -3.0 and -5.0 V DC.
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ML13155
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TYPICAL PERFORMANCE AT TEMPERATURE
(See Figure 2. Test Circuit) Figure 3. Drain Current versus Supply Voltage
I14 and I Total, DRAIN CURRENT (mAdc) 10 TA = 25C ITotal = I14 + I11 I 12 , RSSI OUTPUT ( A) 8.0 6.0 I14 4.0 2.0 0.0 0.0 80 60 40 20 0 10 - 20 dBm 100 0 dBm -10 dBm VEE = - 5.0Vdc
Figure 4. RSSI Output versus Frequency and Input Signal Level
- 30 dBm - 40 dBm
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
100 f, FREQUENCY (MHz)
1000
VEE, SUPPLY VOLTAGE (-Vdc)
Figure 5. Total Drain Current versus Ambient Temperature and Supply Voltage
I 11 and I 14 , TOTAL DRAIN CURRENT (mAdc) 9.0 I 14 and I 11, DRAIN CURRENT (mAdc) 8.5 8.0 7.5 7.0 6.5 6.0 5.5 5.0 - 50 - 30 -10 10 30 50 70 90 110 - 3.0 Vdc VEE = - 6.0 Vdc - 5.0 Vdc 5.5 5.0 4.5 4.0 3.5
Figure 6. Detector Drain Current and Limiter Drain Current versus Ambient Temperature
f = 70 MHz VEE = - 5.0 Vdc
I14
I11 3.0 2.5 2.0 - 50 - 30 -10 10 30 50 70 90 110
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 7. RSSI Output versus Ambient Temperature and Supply Voltage
25.0 24.5 , RSSI OUTPUT ( A) 24.0 23.5 23.0 22.5 22.0 21.5 - 50 - 30 - 10 10 30 50 70 90 110 VEE = - 3.0 Vdc VEE = - 5.0 Vdc VEE = - 6.0 Vdc , RSSI OUTPUT ( A) 80 60 100
Figure 8. RSSI Output versus Input Signal Voltage (Vin at Temperature)
TA = + 85C + 25C - 40C 40 20 0 0.1
12
I
I
12
1.0
10
100
1000
TA, AMBIENT TEMPERATURE (C)
Vin, INPUT VOLTAGE (mVrms)
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DIFFERENTIAL DETECTOR OUTPUT VOLTAGE (Pins 4, 5), (mVpp )
Figure 9. Differential Detector Output Voltage versus Ambient Temperature and Supply Voltage
750 700 650 600 550 500 450 400 350 - 50 - 30 -10 10 30 50 70 90 110 - 3.0 Vdc DIFFERENTIAL LIMITER OUTPUT VOLTAGE (Pins 7, 10), (mVrms) VEE = - 6.0 Vdc - 5.0 Vdc 220 200 180 160 140 120 - 50
Figure 10. Differential Limiter Output Voltage versus Ambient Temperature (Vin = 1 and 10 mVrms)
f = 70 MHz VEE = - 5.0 Vdc Vin = 10 mVrms
Vin = 1.0 mVrms
- 30
-10
10
30
50
70
90
TA, AMBIENT TEMPERATURE (C)
TA, AMBIENT TEMPERATURE (C)
Figure 11A. Differential Detector Output Voltage versus Q of Quadrature LC Tank
DIFFERENTIAL DETECTOR OUTPUT (mVpp ) Vin = - 30 dBm 1400 VEE = - 5.0 Vdc fc = 70 MHz 1200 fmod = 1.0 MHz (Figure 16 no external capacitors 1000 between Pins 7, 8 and 9, 10) 800 600 400 200 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 DIFFERENTIAL DETECTOR OUTPUT (mVpp ) 1600 2400 f dev = 6.0 MHz 5.0 MHz 4.0 MHz 3.0 MHz 2.0 MHz 1.0 MHz
Figure 11B. Differential Detector Output Voltage versus Q of Quadrature LC Tank
Vin = - 30 dBm VEE = - 5.0 Vdc 2000 fc = 70 MHz fmod = 1.0 MHz 1600 (Figure 16 no external capacitors between Pins 7, 8 and 9, 10) 1200 800 400 0 1.5 f dev = 6.0 MHz 5.0 MHz 4.0 MHz 3.0 MHz 2.0 MHz 1.0 MHz 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Q OF QUADRATURE LC TANK
Q OF QUADRATURE LC TANK
Figure 11. Figure 12. RSSI Output Voltage versus IF Input
0 RSSI OUTPUT VOLTAGE, (Vdc) - 1.0 - 2.0 - 3.0 - 4.0 - 5.0 15 dB Interstage Attenuator S+N, N (dB) VEE = - 5.0 Vdc fc = 70 MHz (See Figure 16) 10 Capacitively coupled interstage: no attenuation 0 -10 - 20 - 30 - 40 - 50 - 60 - 60 - 40 - 20 0 20 - 70 - 90 fc = 70 MHz fmod = 1.0 MHz fdev = 5.0 MHz VEE = - 5.0 Vdc - 70 - 50 N S+N
Figure 13. S+N, N versus IF Input
- 80
- 30
- 10
10
IF INPUT, (dBm)
IF INPUT (dBm)
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In the S-parameters measurements, the IF is treated as a two-port linear class A amplifier. The IF amplifier is measured with a single-ended input and output configuration in which the Pins 16 and 7 are terminated in the series combination of a 47 resistor and a 10 nF capacitor to VCC ground (see Figure 14. S-Parameter Test Circuit). The S-parameters are in polar form a the magnitude (MAG) and angle (ANG). Also listed in the tables are the calculated
values for the stability and factor (K) and the Maximum Available Gain (MAG). These terms are related in the following equations: K = (1-IS11 I2-IS22I2 + II2)/(2 I S12 S21 I) where: I I = I S11 S22-S12 S21 I. MAG = 10 log I S21 I/I S12 I + 10 log I K-(K2-1)1/2 I where: K >1. The necessary and sufficient conditions for unconditional stability are given as K>1: B1 = 1 + I S11 I2 - I S22 I2 - I I2 > 0
Figure 14. S-Parameter Test Circuit
IF Input SMA 1.0n 1 IN1 C2 2 DEC1 3 VCC1 4 DETO1 5 DETO2 6 VCC2 7 LIMO1 47 1.0n 8 QUAD1 QUAD2 9 DEC2 15 VEE1 14 1.0n RSSI 13 Buffer RSSI 12 VEE2 11 SMA LIMO2 10 1.0n IF Output 100n 10 + VEE IN2 16 C15 1.0n 47
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ML13155
LANSDALE Semiconductor, Inc.
S-Parameters (VEE = - 5.0 Vdc, TA = 25C, C2 and C15 = 0 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.94 0.78 0.48 0.59 0.75 0.95 0.98 0.95 0.93 0.91 0.87 0.89 0.61 0.56 0.54 ANG -13 -2 3 1.0 15 17 7.0 -10 -16 -2 3 -3 4 -4 7 -103 -156 162 131 Forward S21 MAG 8.2 23.5 39.2 40.3 40.9 42.9 42.2 39.8 44.2 39.5 34.9 11.1 3.5 1.2 0.8 ANG 143 109 51 34 19 - 6.0 - 48 - 68 - 93 -139 -179 - 58 -164 92 42 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.002 0.022 0.03 0.048 0.072 ANG 7.0 - 40 - 97 - 41 - 82 - 42 - 9.0 112 80 106 77 57 0 - 44 - 48 Output S22 MAG 0.87 0.64 0.34 0.33 0.41 0.45 0.52 0.54 0.53 0.50 0.42 0.40 0.52 0.47 0.44 ANG - 22 - 31 -17 -13 -1.0 0 - 3.0 -16 - 22 - 34 - 44 -117 179 112 76 K MAG 2.2 4.2 8.7 10.6 5.7 1.05 0.29 1.05 0.76 0.94 0.97 0.75 2.6 4.7 5.1 MAG dB 32 33.5 33.7 34.6 36.7 46.4 - 46.4 - - - - 13.7 4.5 0.4
S-Parameters (VEE = - 5.0 Vdc, TA = 25C, C2 and C15 = 100 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.98 0.50 0.87 0.90 0.92 0.92 0.91 0.91 0.91 0.90 0.86 0.80 0.62 0.56 0.54 ANG -15 - 2.0 8.0 5.0 3.0 - 2.0 - 8.0 -11 -15 - 22 - 33 - 66 - 96 -120 -136 Forward S21 MAG 11.7 39.2 39.9 40.4 41 42.4 41.2 39.1 43.4 38.2 35.5 8.3 2.9 1.0 0.69 ANG 174 85.5 19 9.0 1.0 -14 - 45 - 63 - 84 -126 -160 - 9.0 - 95 -171 154 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.002 0.012 0.013 0.020 0.034 ANG -14 -108 100 - 40 - 40 - 87 85 76 85 96 78 75 50 53 65 Output S22 MAG 0.84 0.62 0.47 0.45 0.44 0.49 0.50 0.52 0.50 0.43 0.43 0.57 0.49 0.44 0.44 ANG - 27 - 35 - 9.0 - 8.0 - 5.0 - 6.0 - 5.0 - 4.0 -11 - 22 - 21 - 63 -111 -150 -179 K MAG 1.2 6.0 4.2 3.1 2.4 2.4 2.3 2.2 1.3 1.4 1.3 1.7 6.3 13.3 12.5 MAG dB 37.4 35.5 39.2 40.3 41.8 41.9 42 41.6 43.6 41.8 39.4 23.5 12.5 2.8 - 0.8
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S-Parameters (VEE = - 5.0 Vdc, TA = 25C, C2 and C15 = 680 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.74 0.90 0.91 0.91 0.91 0.91 0.90 0.90 0.91 0.94 0.95 0.82 0.66 0.56 0.54 ANG 4.0 3.0 0 0 - 2.0 - 4.0 - 8.0 -10 -14 - 20 - 33 - 63 - 98 -122 -139 Forward S21 MAG 53.6 70.8 87.1 90.3 92.4 95.5 89.7 82.6 77.12 62.0 56.9 12.3 3.8 1.3 0.87 ANG 110 55 21 11 2.0 -16 - 50 -70 -93 -122 -148 -12 -107 177 141 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.003 0.007 0.014 0.028 0.048 ANG 101 60 -121 -18 33 63 - 43 92 23 96 146 79 84 78 76 Output S22 MAG 0.97 0.68 0.33 0.25 0.14 0.12 0.24 0.33 0.42 0.42 0.33 0.44 0.40 0.39 0.41 ANG - 35 - 34 - 60 - 67 - 67 -15 26 21 -1.0 - 22 - 62 - 67 -115 -166 165 K MAG 0.58 1.4 1.1 1.2 1.5 1.3 1.8 1.4 1.05 0.54 0.75 1.8 4.8 8.0 7.4 MAG dB - 45.6 49 48.4 47.5 48.2 46.5 47.4 49 - - 26.9 14.6 4.7 0.96
S-Parameters (VEE = - 3.0 Vdc, TA = 25C, C2 and C15 = 0 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.89 0.76 0.52 0.59 0.78 0.95 0.96 0.93 0.91 0.86 0.81 0.70 0.62 0.39 0.44 ANG -14 - 22 5.0 12 15 5.0 -11 -17 - 25 - 37 - 49 - 93 -144 -176 166 Forward S21 MAG 9.3 24.2 35.7 38.1 37.2 38.2 39.1 36.8 34.7 33.8 27.8 6.2 1.9 0.72 0.49 ANG 136 105 46 34 16 - 9.0 - 50 - 71 - 99 -143 86 - 41 -133 125 80 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.003 0.015 0.049 0.11 0.10 ANG 2.0 - 90 - 32 - 41 - 92 47 -103 - 76 -152 53 76 93 56 -18 - 52 Output S22 MAG 0.84 0.67 0.40 0.40 0.40 0.51 0.48 0.52 0.51 0.49 0.55 0.40 0.40 0.25 0.33 ANG - 27 - 37 -13 -10 -1.0 - 4.0 - 6.0 -13 -19 - 34 - 56 -110 -150 163 127 K MAG 3.2 3.5 10.6 9.1 5.7 0.94 1.4 2.2 3.0 1.7 2.4 2.4 3.0 5.1 7.5 MAG dB 30.7 34.3 33.3 34.6 36.3 - 43.7 41.4 39.0 39.1 35.1 19.5 8.25 -1.9 - 4.8
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S-Parameters (VEE = - 3.0 Vdc, TA = 25C, C2 and C15 = 100 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.97 0.53 0.88 0.90 0.92 0.92 0.91 0.91 0.91 0.89 0.86 0.78 0.64 0.54 0.53 ANG -15 2.0 7.0 5.0 2.0 - 2.0 - 8.0 -11 -15 - 22 - 33 - 64 - 98 -122 -136 Forward S21 MAG 11.7 37.1 37.7 37.7 38.3 39.6 38.5 36.1 39.6 34.4 32 7.6 2.3 0.78 0.47 ANG 171 80 18 8.0 1.0 -15 - 46 - 64 - 85 -128 -163 -12 -102 179 144 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.002 0.013 0.027 0.040 0.043 ANG - 4.0 - 91 - 9.0 -11 - 59 29 - 21 49 114 120 86 94 58 38.6 23 Output S22 MAG 0.84 0.57 0.48 0.49 0.51 0.48 0.51 0.50 0.52 0.48 0.40 0.46 0.42 0.35 0.38 ANG - 27 - 31 - 7.0 - 7.0 - 9.0 - 3.0 - 7.0 - 8.0 -13 - 23 - 26 - 71 -109 -147 -171 K MAG 1.4 6.0 3.4 2.3 2.0 1.9 2.3 2.3 1.7 1.6 1.7 1.9 4.1 10.0 15.4 MAG dB 36.8 34.8 39.7 41 41.8 42.5 41.4 40.8 37.8 40.1 37.8 22.1 10.1 - 0.14 - 4.52
S-Parameters (VEE = - 3.0 Vdc, TA = 25C, C2 and C15 = 680 pF)
Frequency MHz 1.0 2.0 5.0 7.0 10 20 50 70 100 150 200 500 700 900 1000 Input S11 MAG 0.81 0.90 0.91 0.90 0.91 0.91 0.90 0.90 0.91 0.93 0.90 0.79 0.65 0.56 0.55 ANG 3.0 2.0 0 -1 - 2.0 - 4.0 - 8.0 -11 -14 - 21 - 43 - 65 - 97 -122 -139 Forward S21 MAG 37 47.8 58.9 60.3 61.8 63.8 60.0 56.5 52.7 44.5 41.2 7.3 2.3 0.80 0.52 ANG 101 52.7 20 11 3.0 - 15 - 48 - 67 - 91 -126 -162 -13 -107 174 137 Rev S12 MAG 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.001 0.003 0.008 0.016 0.031 0.50 ANG -19 - 82 104 - 76 105 59 96 113 177 155 144 80 86 73 71 Output S22 MAG 0.90 0.66 0.37 0.26 0.18 0.11 0.22 0.29 0.36 0.35 0.17 0.44 0.38 0.38 0.41 ANG - 32 - 39 - 56 - 55 - 52 -13 33 15 5.0 -17 - 31 - 75 -124 -174 157 K MAG 1.1 0.72 2.3 2.04 2.2 2.0 2.3 2.3 2.0 1.8 1.6 3.0 7.1 12 11.3 MAG dB 43.5 - 44 44 43.9 44.1 43.7 43.2 43 42.7 34.1 22 10.2 0.37 - 3.4
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DC BIASING CONSIDERATIONS The DC biasing scheme utilizes two VCC connections (Pins 3 and 6) and two VEE connections (Pins 14 and 11). VEE1 (Pin 14) is connected internally to the IF and RSSI circuits' negative supply bus while the VEE2 (Pin 11) is connected internally to the quadrature detector's negative bus. Under positive ground operation, this unique configuration offers the ability to bias the RSSI and IF separately from the quadrature detector. When two ICs are cascaded as shown in the 70 MHz application circuit and provided by the PCB (see Figures 17 and 18), the first ML13155 is used without biasing its quadrature detector, thereby saving approximately 3.0 mA. A total current of 7.0 mA is used to fully bias each IC, thus the total current in the application circuit is approximately 11 mA. Both VCC pins are biased by the same supply. VCC1 (Pin 3) is connected internally to the positive bus of the first half of the IF limiting amplifier, while VCC2 is internally connected to the positive bus of the RSSI, the quadrature detector circuit, and the second half of the IF limiting amplifier (see Figure 15). This distribution of the VCC enhances the stability of the IC. RSSI CIRCUITRY The RSSI circuitry provides typically 35 dB of linear dynamic range
and its output voltage swing is adjusted by selection of the resistor from Pin 12 to VEE. The RSSI slope is typically 2.1 A/dB; thus, for a dynamic range of 35 dB, the current output is approximately 74 A. A 47 k resistor will yield an RSSI output voltage swing of 3.5 Vdc. The RSSI buffer output at Pin 13 is an emitter-follower and needs an external emitter resistor of 10 k to VEE. In a cascaded configuration (see circuit application in Figure 16), only one of the RSSI Buffer outputs (Pin 13) is used; the RSSI outputs (Pin 12 of each IC) are tied together and the one closest to the VEE supply trace is decoupled to VCC ground. The two pins are connected to VEE through a 47 k resistor. This resistor sources a RSSI current which is proportional to the signal level at the IF input; typically 1.0 mVms (-47 dBm) is required to place the ML13155 into limiting. The measured RSSI output voltage response of the application circuit is shown in Figure 12. Since the RSSI current output is dependent upon the input signal level at the IF input, a careful accounting of filter losses, matching and other losses and gains must be made in the entire receiver system. In the block diagram of the application circuit shown below, an accounting of the signal levels at points throughout the system shows how the RSSI response in Figure 12 is justified.
Block Diagram of 70 MHz Video Receiver Application Circuit
Input Level: - 45 dBm 1.26 mVrms - 70 dBm 71 Vrms - 72 dBm 57 Vrms - 32 dBm 57 Vrms - 47 dBm 1.0 mVrms Minimum Input to Acquire Limiting in ML13155
IF Input Saw Filter 1:4 Transformer - 25 dB 2.0 dB (Insertion Loss) (Insertion Loss)
16 ML13155 1 40 dB Gain
10
16 ML13155
7 -15 dB (Attenuator)
1 40 dB Gain
CASCADING STAGES The limiting IF output is pinned-out differentially, cascading is easily achieved by AC coupling stage to stage. In the evaluation PCB, AC coupling is shown, however interstage filtering may be desirable in some application. In which case, the S-parameters provide a means to implement a low loss interstage match and better receiver sensitivity. Where a linear response of the RSSI output is desired when cascading the ICs, it is necessary to provide at least 10 dB of interstage loss. Figure 12 shows the RSSI response with and without interstage loss. A 15 dB resistive attenuator is an inexpensive way to linearize the RSSI response. This has its drawbacks since it is a wideband noise source that is dependent upon the source and load impedance and the amount of attenuation that it provides. A better, although more costly, solution would be a bandpass filter designed to the desired center frequency and bandpass response while carefully
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selecting the insertion loss. A network topology shown below may be used to provide a bandpass response with the desired insertion loss.
Network Topology
1.0n
10 0.22 7
16
1
1.0n
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LANSDALE Semiconductor, Inc.
QUADRATURE DETECTOR The quadrature detector is coupled to the IF with internal 2.0 pF. capacitors between Pins 7 and 8 and Pins 9 and 10. For wideband data applications, such as FM video and satellite receivers, the drive to the the detector can be increased with additional external capacitors between these pins, thus, the recovered video signal level output is increased for a given bandwidth (see Figure 11A and Figure 11B). The wideband performance of the detector is controlled by the loaded Q of the LC tank circuit. The following equation defines the components which set the detector circuit's bandwidth: Q=RT/XL (1) where: RT is the equivalent shunt resistance across the LC Tank and XL is the reactance of the quadrature inductor at the IF frequency (XL = 2fL). The inductor and capacitor are chosen to form a resonant LC Tank with the PCB and parasitic device capacitance at the desired IF center frequency as predicted by: (2) fc = (2 (LCp))-1 where: L is the parallel tank inductor and Cp is the equivalent parallel capacitance of the parallel resonant tank circuit. The following is a design example for a wideband detector at 70 MHz and a loaded Q of 5. The loaded Q of the quadrature detector is chosen somewhat less than the Q of the IF bandpass. For an IF frequency of 70 MHz and an IF bandpass of 10.9 MHz, the IF bandpass Q is approximately 6.4. Example: Let thE external Cext = 20 pF. (The minimum value here should be greater than 15 pF making it greater than the internal device and PCB parasitic capacitance. Cint 3.0 pF). Cp = Cint + Cext = 23 pF Rewrite Equation 2 and solve for L: L = (0.159)2/(Cp fc2) L = 198 nH, thus, a standard value is chosen. L = 0.22 H (tunable shielded inductor).
The value of the total damping resistor to obtain the required loaded Q of 5 can be calculated by rearranging Equation 1: RT = Q(2fl) RT = 5(2)(70)(0.22) - 483.8 The internal resistance, Rint between the quadrature tank Pins 8 and 9 is approximately 3200 and is considered in determining the external resistance, Rext which is calculated from: Rext = ((RT)(Rint))/(Rint-RT) Rext = 570, thus, choose the standard value Rext = 560 SAW FILTER In wideband video data applications, the IF occupied bandwidth may be several MHz wide. A good rule of thumb is to choose the IF frequency about 10 or more times greater than the IF occupied bandwidth. The IF bandpass filter is a SAW filter in video data applications where a very selective response is needed (i.e., very sharp bandpass response). The evaluation PCB is laid out to accommodate two SAW filter package types: 1) A five-leaded plastic SIP package. Recommended part numbers are Siemens X6950M which operates at 70 MHz; 10.4 Mhz 3 dB passband, X6951M (X252.8) which operates at 70 Mhz; 9.2 MHz 3 dB passband; and X6958M which operates at 70 MHz, 6.3 MHz 3 dB passband, and 2) A four-leaded TO-39 metal can package. Typical insertion loss in a wide bandpass SAW filter is 25 dB. The above SAW filters require source and load impedances of 50 to assure stable operation. On the PC board layout, space is provided to add a matching network, such as a 1:4 surface mount transformer between the SAW filter output and the input to the ML13155. A 1:4 transformer, made by Coilcraft and Mini Circuits, provides a suitable interface (see Figures 16, 17 and 18). In the circuit and layout, the SAW filter and the ML13155 are differentially configured with interconnect traces which are equal in length and symmetrical. This balanced feed enhances RF stability, phase linearity, and noise performance.
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ML13155
Page 12 of 16
Figure 15. Simplified Internal Circuit Schematic
VCC 1 LIM Out 10 9 8 7 LIM Out 3 Quad Coil VCC 2 6 1.6k 2.0p 1.6k 2.0p 1.0p 8.0k 8.0k Det Out
Decouple
15
2
13
12
RSSIRSSI Buffer
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Bias Bias 14 VEE 1
10p
1.0k
1.0k
Figure 15.
16
1
11 VEE 2
Input
Input
LANSDALE Semiconductor, Inc.
Issue A
ML13155
Figure 16. 70 MHz Video Receiver Application Circuit
LANSDALE Semiconductor, Inc.
If Input 1:4 1 2 3 SAW Filter 4 220 SAW Filter is Siemens Part Number X6950M 1.0n ML13155 1 IN1 2 DEC1 3 VCC1 4 DETO1 5 DETO2 6 VCC2 7 LIMO1 8 QUAD1 820 820 820 1.0n 1 IN1 2 DEC1 3 VCC1 100n Detector Output 100n 4 DETO1 33p 33p 1.0k 5 DETO2 1.0k 6 VCC2 7 LIMO1 2.0p 8 QUAD1 560 20p L L- Coilcraft part number 146-08J08S 0.22 QUAD2 9 VEE2 11 10n LIMO2 10 2.0p 10 VEE2 + RSSI 13 Buffer RSSI 12 1.0n IN2 16 DEC2 15 100p VEE1 14 10n 820 IN2 16 DEC2 15 VEE1 14 RSSI 13 Buffer RSSI 12 1.0n VEE2 11 10n LIMO2 10 QUAD2 9 + 10 VEE1 1.0n RSSI Output 5
100p
100p 10n 47k
10k
100n
ML13155
100p
Page 13 of 16
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Issue A
ML13155
LANSDALE Semiconductor, Inc.
Legacy Applications Information
Figure 17. Component Placement (Circuit Side)
Figure 18. Component Placement (Ground Side)
Page 14 of 16
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Issue A
ML13155
LANSDALE Semiconductor, Inc.
Legacy Applications Information
Figure 19. Circuit Side View
4.0"
4.0"
Figure 20. Ground Side View
Page 15 of 16
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Issue A
ML13155
LANSDALE Semiconductor, Inc.
OUTLINE DIMENSIONS
SO-16 = -5P (ML13155-5P) PLASTIC PACKAGE CASE 751B (SO-16)
-A -
16 9
1
-B -
8
P
8 PL
0.25 (0.010)
M
B
M
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. 751B-03 IS OBSOLETE, NEW STANDARD 751B-04. MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.229 0.244 0.010 0.019
G C
SEATING PLANE
R X 45
-T - 0.25 (0.010)
D 16 PL
M
K B
S
M
F
J
T
A
S
DIM A B C D F G J K M P R
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. "Typical" parameters which may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by the customer's technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
Page 16 of 16
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Issue A

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